Verilog - vhdl Homework Help - Answers

Get Verilog - vhdl help at Tutlance. Hire the best Verilog - vhdl homework helpers online cheap, easy, and fast. Post your Verilog - vhdl homework questions and get answers from qualified Verilog - vhdl assignment helpers.

Ready to get started? Hire an expert now.

Reliable & Fast Homework Help

Get help now (Free)
Experienced Tutors
24/7 Support
Cheapest Rates

Subjects/Fields

Recently Asked Verilog - vhdl Assignment Help, Questions and Answers

We found 0 assignments related to this topic. Please note we do not publish private questions here.
Need help with Verilog - vhdl homework? Get Verilog - vhdl homework help and answers from the best Verilog - vhdl assignment homework helpers. Find Verilog - vhdl answers cheap online
Clear Search
No public questions and answers found. Click here to hire an expert.

Verilog - vhdl assignment help online -homework, answers

The VHSIC Hardware Description Language (VHDL) is a universal hardware description language. It is described in the ANSI X3J3/89-003R and IEEE 1076-1987 standard documents, which are incorporated herein by reference. The current version of this document is available from the "VHDL Users' Group" of Austin, Texas. The VHDL language is designed to facilitate the task of hardware design and verification. It is intended for use by designers, modelers, and verification specialists in both academia and industry.

The VHDL Language Assignment Help

VHDL stands for the 'Very High Speed Integrated Circuit Hardware Description Language'. Invented in the late 1980s, this is a hardware design language that can be used to describe the behaviour of digital circuits at a more detailed level than schematics. However, it has now become an international standard with various forms of VHDL existing (there are three official revisions currently - I, II and III). The main differences between them are largely syntactical; e.g. how different statements are presented and ordered . In fact , revision III (the most recent) was specifically designed for use with structural HDLs like Verilog.

The language provides constructs that allow a high level description of any aspect of hardware including: Arithmetic/logic units (ALU), finite state machines (FSM), input-output blocks (IOB), address generators, control blocks like sequencers, storage elements like latches or flip-flops. The purpose of this document is to introduce the basic concepts of VHDL as a hardware description language. This document will also describe many helpful features. Most useful features are illustrated with examples; however it is important to note that VHDL has many more constructs and features than are mentioned in this document.

The intended audience is those who have some background in digital systems. They should be familiar with the basic elements of digital logic such as gates, flip-flops, etc... and how they are connected together to form combinatorial and sequential circuits. Designers with a solid background on building hardware will find that VHDL fits their way of thinking quite naturally.

This tutorial intends to give designers an understanding of VHDL's major design philosophy which is very different from other HDLs currently available without attempting to provide complete details on all concepts or all constructs available in the language. With a little effort, anyone can learn what he needs about VHDL to get started using it for his design.

This document will describe the basic concepts of VHDL and also many helpful features. Most useful features are illustrated with examples; however it is important to note that VHDL has many more constructs and features than are mentioned in this document.

The intended audience for this document is anyone interested in learning about VHDL. It requires a minimum of hardware background, and attempts to express the concepts at an intuitive level without getting bogged down in technical details or terminology. The pace of reading can be adjusted to suit you by skipping over sections that seem too slow or redundant to you.

Introduction to VHDL : A Hardware Description Language

A typical digital system is composed of four basic elements: logic, memory, control and input/output (I/O). The purpose of the design process is to identify those components and their interconnections that will accomplish the goals of the designer. To design a system using conventional techniques you would have a schematic showing how to connect these components together. Translating this schematic into an actual physical implementation requires detailed knowledge about: * How the individual components should be connected together to form proper combinatorial circuits such as adders or multipliers; * How many gates are needed for each circuit function; * What type of transistors or other active device are needed for each gate; * How to connect these gates and devices together to form the desired circuits; * The physical layout of each device (e.g. how a transistor is placed, what type of package it should be in, etc); and - If applicable- * How much space is needed for interconnection between devices. In addition there must also be detailed knowledge about timing aspects such as: * How long does a particular piece of data stay at a certain location ? This information forms the PC board layout referred to as timing constraints.

This design process can be very time consuming depending on its complexity. It requires that the designer either have knowledge about creating circuits with logic elements or has access through documentation to all details necessary for implementation purposes. The VHDL language was created to provide all of this information in a single description. On the high level, VHDL is used as follows:

The major difference between VHDL and other HDLs currently available is that VHDL attempts to capture the entire design process in one language. In addition to specifying how an individual circuit will behave, it has primitives (or constructs) for describing how processors such as microprocessors should be designed. As with logic design, a detailed knowledge of semiconductor devices are not required when using these constructs. Using these constructs allows designers to focus more on the behavior of their system than its implementation details which frees them from having a thorough understanding of hardware technology issues.

To design using conventional methods , you would have a series of schematics; one for each level of abstraction. When designing using VHDL, you have a single description called the VHDL design that consists of at least: * A behavioral model - this is equivalent to creating logic circuits with gates and transistors * The data structures used in the design- this includes specifying how memory cells are connected together as well as how variables are stored (in main memory versus on disk for example)

VHDL contains many additional constructs for use during the description.

They can be classified into three major categories:

1) constructs that capture high level system behavior

2) information necessary to map/translate the design from an implementation point of view

3) constructs needed by an automatic synthesis tool.

This article will provide a brief overview of VHDL and some of its constructs. A more detailed explanation of the language can be found in various texts listed at the end.

In order to keep this introduction focused on VHDL, we will use an analogy from the world of logic design to illustrate how it works. Throughout this article, VHDL constructs are introduced using specific examples that require a knowledge of digital logic design as well as basic algebraic manipulation. The complete source code for these examples is included at the end (in Pascal). It should be noted that these examples are intended mainly to help you understand how certain constructs work and not necessarily reflect good programming style. In addition, most modern HDLs allow variable declaration on multiple lines or entire procedures to be specified using a single line. Again, the examples contained in this article are only meant to illustrate the use of multiple constructs and not necessarily reflect good programming style.

In general, VHDL is used as follows:

When writing HDL code, you must specify how a particular piece of hardware behaves; for example what happens when an instruction is executed by your micro-processor or what its response time for particular data will be.

Unlike logic design where there are many different ways things can work (e.g. combinational circuits vs sequential circuits), in VHDL it is assumed that all parts behave according to a preconceived notion called a model specification.

The various models supported are listed below:

  • Sequential behavior - statement execution order is strictly defined, if statements, case statements and loops are executed according to their structure
  • Concurrent behavior - more than one unit of execution can work at a time

To describe how the system works, you must specify its:

  • Input/output ports
  • Data type for each port
  • Behavior when data is received from these ports (e.g. what will happen when an instruction is executed)
  • Sequential behavior e.g. which instructions are executed in response to a particular input signal

How the memory cells used by your design should be laid out (how big they should be and how they're connected together).

There are many ways this information could be described; however VHDL provides constructs that make it easy to describe complex hardware behavior in a way that is easy to understand and compile into other hardware.

There are two steps to writing VHDL for sequential hardware:

  • specification of the model, i.e. how your design should be built : description of the behavior of each component, e.g. the functional units contained within it or busses crossing its boundary.

In order to describe the components you use constructs from one or more modeling categories listed below:

  • Data types (integer, floating point etc.)
  • Signals used by internal architecture - Buses that cross between architectural units (e.g. a northbridge providing access to system memory)
  • Functions/procedures describing how various pieces of logic work together These structures allow you to describe the hardware you are creating in a way that is independent of the actual implementation. Using these constructs, VHDL provides the ability to express any hardware function (no matter how complex) as a collection of logically related parts described by one or more signal assignments.

Note: Some texts say "signal assignment" while others say "assignment statement." They mean the same thing and only vary in their use of capitalization.

A signal assignment describes the behavior of your digital design by specifying which signals are generated when certain events occur; for example how two busses should be connected together. A simple example might read " if x=1 then y <= 0x01 else y <= 8'hff ." In this case, we are connecting a bus that crosses the boundary between two units. The condition " x=1 " is called a predicate whose function is to determine if this assignment should be executed or not. If it is true, then y will have value 0x01 . Otherwise (and only when x does not equal 1) it will have the value 8'hff . Note : All VHDL code deals with signed integer values and therefore uses hexadecimal notation (rather than decimal). This means that instead of writing 100 you write 8'b0100 ; for example, instead of saying 32'h3f you say 3'h00100111 .

To create sequential and concurrent hardware we use assigned data types which are basically collections of signals used to store data. Data types are used to describe static logic, such as memory cells; whereas signals are used to describe dynamic behavior, i.e. communications between units of execution or inter-unit busses.

Once we have described the structure of our hardware using a set of signal assignments, we can then easily organize and connect them together with constructs called primitives.

A primitive is simply a collection of related features that allow us to work quickly and efficiently at the statement level by using descriptive names instead of raw binary representations (of which there are many).

The following list describes some common VHDL primitives:

  • Sequential statements e.g. if/else , case/case_when_else
  • Iteration e.g. repeat, for
  • Conditional decision e.g. if/else , case/case_when_else
  • Logical operation e.g. and , or , not

These constructs make it very easy to create synchronous logic functions with a minimum of effort and at a level of abstraction that makes design intent clear.

To handle asynchronous events the VHDL language allows you to describe existing sequential code as concurrent hardware by using constructs called tasks .

As well as describing behavior in terms of sequence (how various parts are connected together), we also need mechanisms for dealing with issues like timing constraints e.g. real-time response vs non-real-time response etc.) For this purpose, VHDL provides constructs that allow us to specify the timing and behavior for various sections of our design.

This is done by giving each task its own speed attribute, which specifies how fast it operates in relation to other tasks. For example, you may set one operation to run at 5x the speed of another; or you might want to make sure that two busses are connected together within 300ns (i.e. 3'000ps). Using these constructs we can specify how fast different pieces of logic react to events occurring around them. Hence, if there is a hardware fault detected on line x , then re-route it through y . This makes your design simple and easy to understand because you can not only describe what happens but also when and why something does happen. Note : Typically, the VHDL language is used to describe digital systems (although it has also been used for analog designs). However, it can do much more and in fact allows you to describe your hardware at whatever level of abstraction you choose. For example, by using data types, signals and tasks you can create models incorporating soft-core processors or microcontrollers .

A typical process could then be as follows:

  • Create a description of an embedded processor model
  • Use this model to create a system capable of executing C code
  • Use C routines within this simulation
  • Load the resulting code onto real hardware

Further Information : For practical examples on how to use the VHDL language, you may want to try some of the following texts:

VHDL Schematics homework help

The schematic view of hardware provides a representation of our circuit as seen from its inputs and outputs. The main purpose is to allow us to visually check connectivity between functional units in a design.

To get an idea of what a schematic looks like, we'll look at the following sample circuit:

This is just one example of how you might draw your circuit in a schematic viewer (in this case OrCAD's schematic capture tool).

The main features are:

  • Drawings can be made 'bigger' or 'smaller' by zooming in and out.
  • Lines can be drawn to indicate connections between devices on the board.
  • You can add text anywhere on the drawing for documentation purposes.
  • Also, notice that there are also a number of devices which are not shown on this screen e.g. wires connecting power supplies to boards, LEDs etc )

As with the block diagram representation used previously , schematics can be very simple or extremely complex. For example, a piece of hardware may only have one input and one output as in the circuit above, whereas more complicated designs might have dozens of inputs and outputs:

Schematics offer an easy way to view circuits and are usually what you would use for board level development. Of course, they aren't always ideal if your design is incredibly complex because schematic capture programs tend not to handle logic functions too well (in that case, drawings will typically start becoming cluttered with lots of small signal blocks - see this as some form of over-simplification).

Also, when it comes to debugging a design , schematic capture tools do not give us much insight into what is going on within particular sub-circuits.

This is because they don't provide a complete enough view of its operation - in much the same way that looking at a block diagram doesn't give us any information about what individual logic sub-functions are doing within it (i.e. we can only see how the outputs are changed when inputs change) .

Moreover, there is no connection between schematics and HDLs (and vice versa). This means that even though you might have been able to verify your circuit on paper , you cannot do so using VHDL/Verilog until you have converted them into another form!

Finally, note that schematic capture programs tend not to work well with complex designs containing serious amounts of state storage or when used for developing complex digital systems such as microprocessors.

.