Computer Science, Custom Problem #2: Deciphering LC-4 Control Signals

I[8:6] RT[15:0] RS[15:0] rdMux.CTL rtMux.CTL Register File SEXT(I[4:0]) LogicMux.CTL SEXT(I[4:0]) ArithMux.CTL ALL CTL SIGNALS (0x8000 | UIMM8) I[10:0] Program MemoryPC DATA Memory NZP Register + + TEST Arith.CTL CMP.CTL LOGIC.CTL SHIFT.CTL CONST.CTL I[15:0] Write Input Instruction Address PC[15:0] I[11:9] RS[15:0] I[7:0] SEXT(I[10:0]) SEXT(I[8:0]) Instruction rs.addr rt.adddr rd.addr regFile.WE I[2:0] I[11:9] 0 1 1 0 1 0 2 3 4 (PC & 0x8000) | (IMM11

ISA Control Signals PCMux.CTL rsMux.CTL rtMux.CTL rdMux.CTL regFile.WE regInputMux.CTL Arith.CTL ArithMux.CTL LOGIC.CTL LogicMux.CTL SHIFT.CTL COSNT.CTL CMP.CTL ALUMux.CTL NZP.WE DATA.WE BRxxx ADD MUL SUB DIV ADD (immediate) CMP CMPU CMPI CMPIU JSR JSRR AND NOT OR XOR AND (immediate) LDR STR RTI CONST SLL SRA SRL MOD JMPR JMP HICONST TRAP

CIT593 Module 6 Assignment 6 Instructions CIT 593 M6 Assignment: LC- 4 ISA Keep in mind: ● This is an individual assignment, NO group work ● Do not alter the formatting of the Microsoft Excel spreadsheet you will be completing for this assignment or the autograder may fail ● To submit: o Assigned Problems and Custom Problem #1: Upload a pdf of your solutions to Gradescope and page-match. (-4 deduction for submissions not page-matched). Page match Global Deductions to page 1 o Custom Problem #2: Upload your completed spreadsheet to the Gradescope autograder item as a .xlsx file (not .numbers) titled CIT593_ISA_CS.xlsx Assigned Problems 1. Name at least three things specified by an ISA. 2. Briefly describe the difference between an ISA and a microarchitecture. 3. Why is an ISA unlikely to change between successive generations of microarchitectures that implement it? For example, why would Intel want to make certain that the ISA implemented by the Pentium III is the same as the one implemented by the Pentium II? Hint: When you upgrade your computer (or buy one with a newer CPU), do you need to throw out all your old software? 4. What are the two components of an instruction? What information do these two components contain? Custom Problems For the custom problems, you will need these three documents. We recommend printing these documents out to use as reference for this assignment: ● LC4-ISA-Instructions.pdf ● LC4-ISA-BlockDiagram.pdf ● LC4-ISA-ControlSignals.pdf Custom Problems on the next page CIT593 Module 6 Assignment 6 Instructions Custom Problem #1: Reverse Assembling (Disassembling machine code) The table below shows the contents of program memory. Using the document entitled LC4-ISA-Instructions.pdf , convert the machine instructions you see to an equivalent sequence of Assembly instructions (not to be confused with the instruction semantics). Hint: start by looking at the four bit opcode – be careful how you break up the 16 bit fields, one bit can make a big difference. Address Machine Instruction Assembly Instruction Example 0001001010000011 ADD R1, R2, R3 0 1001000000000010 1 1001001000000011 2 0001010000100000 3 0010001100000001 4 0000110000000011 5 0001010010001000 6 0001001001111111 7 0000111111111011 Custom Problem #2: Deciphering LC-4 Control Signals The LC4 has 29 instructions listed in the document LC4-ISA-Instructions.pdf . Your job is to determine the control signals, as shown in the self-paced segment titled Logical Instructions in the ISA in this module (recall the ADD/CMP/SRA/LDR are shown in the second slide). You will also need the documents LC4-ISA-BlockDiagram.pdf and LC4-ISA-ControlSignals.pdf to help you. As you determine each control signal, populate the spreadsheet that accompanies this assignment entitled CIT593_ISA_Assignment_Control_Signals_Spreadsheet.xlsx. Remember to title your submission sheet CIT593_ISA_CS.xlsx for submission

Description+of+Control+Signals+in+Single+Cycle+Implementation+of+the+LC4+ISA+ ! Signal!Name! #!of!bits! Value! Action! PCMux.CTL! 3! 0! Value!of!NZP!register!compared!to!bits!I[11:9]!of!the!current! instruction!if!the!test!is!satisfied!then!the!!output!of!TEST!is!1!and! NextPC!=!BRANCH!Target,!(PC+1)!+!SEXT(IMM9);!otherwise!the! output!of!TEST!is!0!and!NextPC!=!PC!+!1! 1! Next!PC!=!PC+1! 2! Next!PC!=!(PC+1)!+!SEXT(IMM11)! 3! Next!PC!=!RS! 4! Next!PC!=!(0x8000!|!UIMM8)! 5! Next!PC!=!(PC!&!0x8000)!|!(IMM11!

LC4 Instruction Set Mnemonic Semantics Encoding Instructions NOP Do Nothing 0000000--------- BRn IMM9 N ? PC = PC+1+SEXT(IMM9) 0000100IIIIIIIII BRnz IMM9 N|Z ? PC = PC+1+SEXT(IMM9) 0000110IIIIIIIII BRnp IMM9 N|P ? PC = PC+1+SEXT(IMM9) 0000101IIIIIIIII BRz IMM9 Z ? PC = PC+1+SEXT(IMM9) 0000010IIIIIIIII BRzp IMM9 Z|P ? PC = PC+1+SEXT(IMM9) 0000011IIIIIIIII BRp IMM9 P ? PC = PC+1+SEXT(IMM9) 0000001IIIIIIIII BRnzp IMM9 PC = PC+1+SEXT(IMM9) 0000111IIIIIIIII ADD Rd Rs Rt Rd = Rs + Rt 0001dddsss000ttt MUL Rd Rs Rt Rd = Rs * Rt 0001dddsss001ttt SUB Rd Rs Rt Rd = Rs - Rt 0001dddsss010ttt DIV Rd Rs Rt Rd = Rs / Rt 0001dddsss011ttt ADD Rd Rs IMM5 Rd = Rs + SEXT(IMM5) 0001dddsss1IIIII CMP Rs Rt NZP = signed-CC(Rs-Rt) 0010sss00----ttt CMPU Rs Rt NZP = unsigned-CC(Rs-Rt) 0010sss01----ttt CMPI Rs IMM7 NZP = signed-CC(Rs-SEXT(IMM7)) 0010sss10IIIIIII CMPIU Rs UIMM7 NZP = unsigned-CC(Rs-UIMM7) 0010sss11UUUUUUU JSR IMM11 R7 = PC + 1; PC = (PC & 0x8000) | (IMM11 > UIMM4 1010dddsss01UUUU SRL Rd Rs UIMM4 Rd = Rs >> UIMM4 1010dddsss10UUUU MOD Rd Rs Rt Rd = Rs % Rt 1010dddsss11-ttt JMPR Rs PC = Rs 11000--sss------ JMP IMM11 PC = PC+1+SEXT(IMM11) 11001IIIIIIIIIII HICONST Rd, UIMM8 Rd = (Rd & 0xFF) | (UIMM8

LC4 Instruction Set Mnemonic Semantics Encoding Instructions NOP BRn IMM9 BRnz IMM9 BRnp IMM9 BRz IMM9 BRzp IMM9 BRp IMM9 BRnzp IMM9 Do Nothing (N ) ? PC = PC + 1 + SEXT(IMM9) (N|Z ) ? PC = PC + 1 + SEXT(IMM9) (N | P) ? PC = PC + 1 + SEXT(IMM9) (Z ) ? PC = PC + 1 + SEXT(IMM9) ( Z|P) ? PC = PC + 1 + SEXT(IMM9) ( P) ? PC = PC + 1 + SEXT(IMM9) (N|Z|P) ? PC = PC + 1 + SEXT(IMM9) 0000 000- ---- ---- 0000 100I IIII IIII 0000 110I IIII IIII 0000 101I IIII IIII 0000 010I IIII IIII 0000 011I IIII IIII 0000 001I IIII IIII 0000 111I IIII IIII ADD Rd Rs Rt MUL Rd Rs Rt SUB Rd Rs Rt DIV Rd Rs Rt ADD Rd Rs IMM5 Rd = Rs + Rt Rd = Rs * Rt Rd = Rs - Rt Rd = Rs / Rt Rd = Rs + SEXT(IMM5) 0001 ddds ss00 0ttt 0001 ddds ss00 1ttt 0001 ddds ss01 0ttt 0001 ddds ss01 1ttt 0001 ddds ss1I IIII CMP Rs Rt CMPU Rs Rt CMPI Rs IMM7 CMPIU Rs UIMM7 NZP = signed-CC(Rs - Rt) NZP = unsigned-CC(Rs - Rt) NZP = signed-CC(Rs - SEXT(IMM7)) NZP = unsigned-CC(Rs - UIMM7) 0010 sss0 0--- -ttt 0010 sss0 1--- -ttt 0010 sss1 0III IIII 0010 sss1 1UUU UUUU JSR IMM11 JSRR Rs R7 = PC + 1; PC = (PC & 0x8000) | (IMM11 > UIMM4 Rd = Rs >> UIMM4 Rd = Rs % Rt 1010 ddds ss00 UUUU 1010 ddds ss01 UUUU 1010 ddds ss10 UUUU 1010 ddds ss11 -ttt JMPR Rs JMP IMM11 PC = Rs PC = PC + 1 + SEXT(IMM11) 1100 0--s ss-- ---- 1100 1III IIII IIII HICONST Rd UIMM8 Rd = (Rd & 0xFF) | (UIMM8

CIT593 Module 6 Assignment 6 Submission CIT 593 M6 Assignment: LC-4 ISA Keep in mind: · This is an individual assignment, NO group work · To submit: · Assigned Problems and Custom Problem #1: Upload a pdf of your solutions to Gradescope item “Assignment 06: LC4 ISA” and page-match. (-4 deduction for submissions not page-matched). Page match Global Deductions to page 1 · Custom Problem #2: Upload your completed spreadsheet to the Gradescope autograder item as a .xlsx file (not .numbers) titled CIT593_ISA_CS.xlsx Assigned Problems: 1. 2. 3. 4. Custom Problem #1: Reverse Assembling (Disassembling machine code) Address Machine Instruction Assembly Instruction Example 0001001010000011 ADD R1, R2, R3 0 1001000000000010 1 1001001000000011 2 0001010000100000 3 0010001100000001 4 0000110000000011 5 0001010010001000 6 0001001001111111 7 0000111111111011